From Intellivision Wiki
m (→grammar tweak)
m (Protected "Branch" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite)))
Latest revision as of 08:08, 4 December 2010
|CP1610 Clock Cycles||7 or 9|
The Branch family of instructions is similar to the Jump family of instructions in that Branch instructions are also represented as any of several different possible mnemonics, depending on the flags indicated in the opcode. Branching is different than Jumping, however, in that a Branch could be conditional and the destination is calculated from a relative offset rather than an absolute destination address.
The number of clock cycles used in a Branch depends on whether the condition of the branch results in the branch being taken or not. If the condition is tests true, and the branch occurs, then the opcode will use 9 CP1610 clock cycles. If the condition tests false, then the branch is ignored and the opcode will use 7 CP1610 clock cycles. Note that the Unconditional Branch (B) always branches so it always uses 9 cycles, and the No Operation Branch (NOPP) never branches, so it always uses 7 cycles
The opcode format breaks down as follows.
Format - Decle #1 Format - Word #2 (All 16 bits are significant) 0000:0010:00de:nccc aaaa:aaaa:aaaa:aaaa
d indicates the direction of the branch such that: d == 0 indicates to branch in the forward direction d == 1 indicates to branch in the reverse direction
e indicates to branch on an external condition such that if e == 0, then: nccc == 0000 branch unconditionally (B) nccc == 0001 branch if Carry Flag is set (BC) nccc == 0010 branch if Overflow Flag is set (BOV) nccc == 0011 branch if Sign Flag is clear (BPL) nccc == 0100 branch if Zero Flag is set (BEQ) nccc == 0101 branch if Sign Flag != Overflow Flag (BLT) nccc == 0110 branch if either Zero Flag is set or if Sign Flag != Overflow Flag (BLE) nccc == 0111 branch if Sign Flag != Carry Flag (BUSC) nccc == 1000 do not branch unconditionally (NOPP) nccc == 1001 do not branch if Carry Flag is set (BNC) nccc == 1010 do not branch if Overflow Flag is set (BNOV) nccc == 1011 do not branch if Sign Flag is clear (BMI) nccc == 1100 do not branch if Zero Flag is set (BNEQ) nccc == 1101 do not branch if Sign Flag != Overflow Flag (BGE) nccc == 1110 do not branch if either Zero Flag is set or if Sign Flag != Overflow Flag (BGT) nccc == 1111 do not branch if Sign Flag != Carry Flag (BESC) otherwise if e == 1, then: nccc branch if this value matches the pins EBCA0-EBCA3 (BEXT)
aaaaaaaaaaaaaaaa indicates the amount of offset
Notice that the n parameter from above essentially just negates the internal conditions represented by ccc.
The branch destination is calculated from the address of the opcode immediately following the two-decle Branch instruction such that if the branch instruction is location at $1800 and the offset indicated by aaaaaaaaaaaaaaaa is $0007, then the destination in the forward direction would be $1809. It's a little trickier in the reverse direction because the CP1610 seems to add one to the offset if the branch is in the reverse direction, possibly because it is using ones complement arithmetic to calculate the offset. Either way, if the branch is in the reverse direction, then our example would result in a branch to location $17FA ($1800+2-7-1).
Branches encode a "branch direction" to make small offsets useful. The CP1610 includes many opcode tradeoffs that allow (but do not require) object code to reside in a ROM that 10 bits wide. When wider ROM is available, programs may make use of larger immediate constants. (GI documentation describes 12-bit and 14-bit wide peripherals and memories.) In narrow ROMs, tweaks such as this one make the smaller immediate constant range useful. In this case, one may branch forward or backward by 2K words when code resides in 10-bit ROM. Without the flag, this would not be possible. The direction flag is technically unnecessary when code resides in 16-bit ROM.
The Branch opcode family is often represented as many different mnemonics, to make life a little easier for the programmer. The mnemonic used to represent this opcode depends on the combination of the e, n, and ccc parameters mentioned above, according to the following chart.
Mnemonics To Parameters
|BEQ or BZ||0||0||100|
|BNEQ or BNZ||0||1||100|