MVI@

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Instruction NameMove In Indirect
MnemonicMVI@
CP1610 Clock Cycles8, 10, or 11
InterruptibleYes
Opcode Range$0288-$02AF
Input FlagsDouble Byte Data Flag
Output FlagsNone

The Move In Indirect (MVI@) instruction copies the value from the address contained in the specified address register into the specified destination register. Assuming the Double Byte Data Flag is clear, then this instruction will use 8 clock cycles unless R6 is used as the address register, in which case it will use 11 clock cycles.

If the Double Byte Data Flag is set, then this instruction will perform two indirect reads, using the lowest 8 bits of the first read as the lowest 8 bits of the resulting value and combining them with the lowest 8 bits of the second read as the highest 8 bits of the resulting value. Note that if the address register is R0-R3 (which do not auto-increment or auto-decrement), then the register value will not change between successive indirect reads, and thus the same value at the same address would be read for both indirect reads. If the Double Byte Data Flag is set, this instruction will always use exactly 10 clock cycles regardless of which register is used as the address register.

The "PULR Rx" instruction is an alias for "MVI@ R6, Rx".

   0000:0010:10aa:addd
where: ddd indicates the register containing the value to move such that: ddd == 000 indicates register R0 ddd == 001 indicates register R1 ddd == 010 indicates register R2 ddd == 011 indicates register R3 ddd == 100 indicates register R4 ddd == 101 indicates register R5 ddd == 110 indicates register R6 ddd == 111 indicates register R7
aaa indicates the register containing the address such that: aaa == 000 indicates direct mode MVI instruction aaa == 001 indicates register R1 aaa == 010 indicates register R2 aaa == 011 indicates register R3 aaa == 100 indicates register R4 aaa == 101 indicates register R5 aaa == 110 indicates register R6, which operates in stack mode aaa == 111 indicates register R7, alias for immediate mode MVII
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