Difference between revisions of "Memory Map"

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(mention why the aliases)
(Additional Memory Aliases)
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<tr><td>$3E00-$3FFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$3E00-$3FFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$4000-$403F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
 
<tr><td>$4000-$403F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
 +
<tr><td>$4021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr><!-- Note:  I do need to double check this. -->
 
<tr><td>$7800-$79FF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$7800-$79FF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$7A00-$7BFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$7A00-$7BFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
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<tr><td>$7E00-$7FFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$7E00-$7FFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 
<tr><td>$8000-$803F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
 
<tr><td>$8000-$803F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
 +
<tr><td>$8021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr><!-- Note:  I do need to double check this. -->
 
<tr><td>$B800-$B9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$B800-$B9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$BA00-$BBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$BA00-$BBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
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<tr><td>$BE00-$BFFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$BE00-$BFFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$C000-$C03F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
 
<tr><td>$C000-$C03F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
 +
<tr><td>$C021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr><!-- Note:  I do need to double check this. -->
 
<tr><td>$F800-$F9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$F800-$F9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$FA00-$FBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 
<tr><td>$FA00-$FBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>

Revision as of 07:45, 11 January 2005

Official Memory Map

The "official" memory map published by Mattel is included below.

Memory RangeAccessibilityDevice
$0000-$003FRW, VBlank Period 1STIC Registers
$0100-$01EFRWScratchpad RAM
$01F0-$01FFRWPSG Registers
$0200-$035FRWSystem RAM
$1000-$1FFFRExecutive ROM
$3000-$37FFR, VBlank Period 2Graphics ROM
$3800-$39FFRW, VBlank Period 2Graphics RAM


The Intellivision uses a bidirectional data bus with external pull-up resistors. Each peripheral on the bus (including the CPU) goes to a "high-impedance" state whenever it is not actively driving a value onto the bus. Thus, if the CPU attempts to read from a memory location and no peripheral responds by asserting a value on the bus, the CPU will see all ones (1)—the 16-bit value $FFFF.

Mattel had also reserved additional address ranges for various periperals, such as the Keyboard Component, the PlayCable, and the Intellivoice. Many of these reserved address ranges went effectively unused, and so aren't shown. Each peripheral's address map is documented with the peripheral itself.

Additional Memory Aliases

Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip incompletely decoded addresses that were placed on the address bus. This is an artifact of how the System RAM implements its Bus Copy functionality.

Memory RangeAccessibilityDevice
$3A00-$3BFFRW, VBlank Period 2Graphics RAM
$3C00-$3DFFRW, VBlank Period 2Graphics RAM
$3E00-$3FFFRW, VBlank Period 2Graphics RAM
$4000-$403FW, VBlank Period 1STIC Registers
$4021RW, VBlank Period 1STIC Mode Select register
$7800-$79FFW, VBlank Period 2Graphics RAM
$7A00-$7BFFW, VBlank Period 2Graphics RAM
$7C00-$7DFFW, VBlank Period 2Graphics RAM
$7E00-$7FFFW, VBlank Period 2Graphics RAM
$8000-$803FW, VBlank Period 1STIC Registers
$8021RW, VBlank Period 1STIC Mode Select register
$B800-$B9FFW, VBlank Period 2 Graphics RAM
$BA00-$BBFFW, VBlank Period 2 Graphics RAM
$BC00-$BDFFW, VBlank Period 2 Graphics RAM
$BE00-$BFFFW, VBlank Period 2 Graphics RAM
$C000-$C03FW, VBlank Period 1STIC Registers
$C021RW, VBlank Period 1STIC Mode Select register
$F800-$F9FFW, VBlank Period 2 Graphics RAM
$FA00-$FBFFW, VBlank Period 2 Graphics RAM
$FC00-$FDFFW, VBlank Period 2 Graphics RAM
$FE00-$FFFFW, VBlank Period 2 Graphics RAM