Difference between revisions of "Memory Map"
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| − | + | [[Category:Memory Units]] | |
| − | The "official" memory map published by Mattel is | + | The "official" memory map published by Mattel is below. |
| + | <table border width=80%> | ||
| + | <tr><th>Memory Range<th>Accessibility<th>Device</th></tr> | ||
| + | <tr><td>$0000-$003F</td><td>RW, [[VBlank Period 1]]</td><td>[[STIC#Registers|STIC Registers]]</td></tr> | ||
| + | <tr><td>$0100-$01EF</td><td>RW</td><td>[[Scratchpad RAM]]</td></tr> | ||
| + | <tr><td>$01F0-$01FF</td><td>RW</td><td>[[PSG#Registers|PSG Registers]]</td></tr> | ||
| + | <tr><td>$0200-$035F</td><td>RW</td><td>[[System RAM]]</td></tr> | ||
| + | <tr><td>$1000-$1FFF</td><td>R</td><td>[[Executive ROM]]</td></tr> | ||
| + | <tr><td>$3000-$37FF</td><td>R, [[VBlank Period 2]]</td><td>[[Graphics ROM]]</td></tr> | ||
| + | <tr><td>$3800-$39FF</td><td>RW, [[VBlank Period 2]]</td><td>[[Graphics RAM]]</td></tr> | ||
| + | </table> | ||
| + | <br/> | ||
| + | The Intellivision uses a bidirectional data bus with external pull-up resistors. Each peripheral on the bus (including the CPU) goes to a "high-impedance" state whenever it is not actively driving a value onto the bus. Thus, if the CPU attempts to read from a memory location and no peripheral responds by asserting a value on the bus, the CPU will see all ones (1)—the 16-bit value $FFFF.<br/><br/> | ||
| + | Mattel had also reserved additional address ranges for various periperals, such as the [[Keyboard Component]], the [[PlayCable]], and the [[Intellivoice]]. Many of these reserved address ranges went effectively unused, and so aren't shown. Each peripheral's address map is documented with the peripheral itself. | ||
| + | |||
| + | ==Additional Occupied Memory Ranges== | ||
| + | Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip [[Incomplete Address Decoding|incompletely decoded addresses]] that were placed on the address bus. This is an artifact of how the [[System RAM]] implements its [[Bus Copy]] functionality. For instance, if the CPU reads from the STIC or GRAM aliases it will not see any data from the STIC or GRAM. However, if it reads from $4021, $8021 or $C021 during [[VBlank Period 1]] the STIC <I>will</I> switch into Color Stack mode. Also, the Intellivision 2 throws a few quirks into the equation.<br/><br/> | ||
<table border width=80%> | <table border width=80%> | ||
<tr><th>Memory Range<th>Accessibility<th>Device</th></tr> | <tr><th>Memory Range<th>Accessibility<th>Device</th></tr> | ||
| − | <tr><td>$ | + | <tr><td>$0040-$007F</td><td>R, [[VBlank Period 2]]</td><td>STIC-responsive, but read only</td></tr> |
| − | <tr><td>$ | + | <tr><td>$0360-$03FF</tD><td>R</td><td>Garbage values due to incomplete address decode in RA-3-9600A (Intellivision II only?)</td></tr> |
| − | <tr><td>$ | + | <tr><td>$0400-$04FF</td><td>R</td><td>Additional EXEC ROM, Intellivision II only</td></tr> |
| − | <tr><td>$ | + | <tr><td>$3A00-$3BFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> |
| − | <tr><td>$ | + | <tr><td>$3C00-$3DFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> |
| − | <tr><td>$ | + | <tr><td>$3E00-$3FFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> |
| − | <tr><td>$ | + | <tr><td>$4000-$403F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr> |
| + | <tr><td>$4021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register.</td></tr> | ||
| + | <tr><td>$7800-$79FF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> | ||
| + | <tr><td>$7A00-$7BFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> | ||
| + | <tr><td>$7C00-$7DFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> | ||
| + | <tr><td>$7E00-$7FFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr> | ||
| + | <tr><td>$8000-$803F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr> | ||
| + | <tr><td>$8021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr> | ||
| + | <tr><td>$B800-$B9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$BA00-$BBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$BC00-$BDFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$BE00-$BFFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$C000-$C03F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr> | ||
| + | <tr><td>$C021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr> | ||
| + | <tr><td>$F800-$F9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$FA00-$FBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$FC00-$FDFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
| + | <tr><td>$FE00-$FFFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr> | ||
</table> | </table> | ||
| + | <br/> | ||
| − | == | + | ==Addresses Available to Cartridges== |
| − | + | The Intellivision leaves many addresses available to cartridges. However, several address ranges come with caveats, such as interactions with other devices in the system, or incompatibilities with various peripherals. Below is a summary.<br/> | |
<table border width=80%> | <table border width=80%> | ||
| − | <tr><th>Memory Range<th> | + | <tr><th width=20%>Memory Range<th width=40%>RAM<th width=40%>ROM</th></tr> |
| − | <tr><td>$ | + | <tr><td>$0400-$04FF</td><td>OK on all but Intellivision 2.</td><td>OK on all but Intellivision 2.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$0500-$06FF</td><td>OK</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$0700-$0CFF</td><td>OK if no Intellivoice.</td><td>OK if no Intellivoice.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$0D00-$0FFF</td><td>OK</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$2000-$2FFF</td><td>OK if no ECS.</td><td>OK if no ECS.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$4000-$47FF</td><td>OK if no ECS.</td><td>OK if no ECS.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$4800</td><td>OK only if boot ROM at $7000.</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$4801-$4FFF</td><td>OK</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$5000-$5014</td><td>OK only if boot ROM at $4800 or $7000.</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$5015-$6FFF</td><td>OK</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$7000</td><td>RAM at $7000 confuses EXEC boot sequence.</td><td>OK if no ECS.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$7001-$77FF</td><td>OK if no ECS.</td><td>OK if no ECS.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$7800-$7FFF</td><td>Do not map RAM here due to GRAM alias.</td><td>OK if no ECS.</td></tr> |
| − | <tr><td>$C000-$ | + | <tr><td>$8000-$8FFF</td><td>OK. Avoid STIC alias at $8000-$803F.</td><td>OK. Avoid STIC alias at $8000-$803F.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$9000-$B7FF</td><td>OK</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$B800-$BFFF</td><td>Do not map RAM here due to GRAM alias.</td><td>OK</td></tr> |
| − | <tr><td>$ | + | <tr><td>$C000-$CFFF</td><td>OK. Avoid STIC alias at $C000-$C03F.</td><td>OK. Avoid STIC alias at $C000-$C03F.</td></tr> |
| − | <tr><td>$ | + | <tr><td>$D000-$DFFF</td><td>OK</td><td>OK</td></tr> |
| + | <tr><td>$E000-$EFFF</td><td>OK if no ECS.</td><td>OK if no ECS.</td></tr> | ||
| + | <tr><td>$F000-$F7FF</td><td>OK</td><td>OK</td></tr> | ||
| + | <tr><td>$F800-$FFFF</td><td>Do not map RAM here due to GRAM alias.</td><td>OK</td></tr> | ||
</table> | </table> | ||
Latest revision as of 08:54, 4 December 2010
The "official" memory map published by Mattel is below.
| Memory Range | Accessibility | Device |
|---|---|---|
| $0000-$003F | RW, VBlank Period 1 | STIC Registers |
| $0100-$01EF | RW | Scratchpad RAM |
| $01F0-$01FF | RW | PSG Registers |
| $0200-$035F | RW | System RAM |
| $1000-$1FFF | R | Executive ROM |
| $3000-$37FF | R, VBlank Period 2 | Graphics ROM |
| $3800-$39FF | RW, VBlank Period 2 | Graphics RAM |
The Intellivision uses a bidirectional data bus with external pull-up resistors. Each peripheral on the bus (including the CPU) goes to a "high-impedance" state whenever it is not actively driving a value onto the bus. Thus, if the CPU attempts to read from a memory location and no peripheral responds by asserting a value on the bus, the CPU will see all ones (1)—the 16-bit value $FFFF.
Mattel had also reserved additional address ranges for various periperals, such as the Keyboard Component, the PlayCable, and the Intellivoice. Many of these reserved address ranges went effectively unused, and so aren't shown. Each peripheral's address map is documented with the peripheral itself.
Additional Occupied Memory Ranges
Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip incompletely decoded addresses that were placed on the address bus. This is an artifact of how the System RAM implements its Bus Copy functionality. For instance, if the CPU reads from the STIC or GRAM aliases it will not see any data from the STIC or GRAM. However, if it reads from $4021, $8021 or $C021 during VBlank Period 1 the STIC will switch into Color Stack mode. Also, the Intellivision 2 throws a few quirks into the equation.
| Memory Range | Accessibility | Device |
|---|---|---|
| $0040-$007F | R, VBlank Period 2 | STIC-responsive, but read only |
| $0360-$03FF | R | Garbage values due to incomplete address decode in RA-3-9600A (Intellivision II only?) |
| $0400-$04FF | R | Additional EXEC ROM, Intellivision II only |
| $3A00-$3BFF | RW, VBlank Period 2 | Graphics RAM |
| $3C00-$3DFF | RW, VBlank Period 2 | Graphics RAM |
| $3E00-$3FFF | RW, VBlank Period 2 | Graphics RAM |
| $4000-$403F | W, VBlank Period 1 | STIC Registers |
| $4021 | RW, VBlank Period 1 | STIC Mode Select register. |
| $7800-$79FF | W, VBlank Period 2 | Graphics RAM |
| $7A00-$7BFF | W, VBlank Period 2 | Graphics RAM |
| $7C00-$7DFF | W, VBlank Period 2 | Graphics RAM |
| $7E00-$7FFF | W, VBlank Period 2 | Graphics RAM |
| $8000-$803F | W, VBlank Period 1 | STIC Registers |
| $8021 | RW, VBlank Period 1 | STIC Mode Select register |
| $B800-$B9FF | W, VBlank Period 2 | Graphics RAM |
| $BA00-$BBFF | W, VBlank Period 2 | Graphics RAM |
| $BC00-$BDFF | W, VBlank Period 2 | Graphics RAM |
| $BE00-$BFFF | W, VBlank Period 2 | Graphics RAM |
| $C000-$C03F | W, VBlank Period 1 | STIC Registers |
| $C021 | RW, VBlank Period 1 | STIC Mode Select register |
| $F800-$F9FF | W, VBlank Period 2 | Graphics RAM |
| $FA00-$FBFF | W, VBlank Period 2 | Graphics RAM |
| $FC00-$FDFF | W, VBlank Period 2 | Graphics RAM |
| $FE00-$FFFF | W, VBlank Period 2 | Graphics RAM |
Addresses Available to Cartridges
The Intellivision leaves many addresses available to cartridges. However, several address ranges come with caveats, such as interactions with other devices in the system, or incompatibilities with various peripherals. Below is a summary.
| Memory Range | RAM | ROM |
|---|---|---|
| $0400-$04FF | OK on all but Intellivision 2. | OK on all but Intellivision 2. |
| $0500-$06FF | OK | OK |
| $0700-$0CFF | OK if no Intellivoice. | OK if no Intellivoice. |
| $0D00-$0FFF | OK | OK |
| $2000-$2FFF | OK if no ECS. | OK if no ECS. |
| $4000-$47FF | OK if no ECS. | OK if no ECS. |
| $4800 | OK only if boot ROM at $7000. | OK |
| $4801-$4FFF | OK | OK |
| $5000-$5014 | OK only if boot ROM at $4800 or $7000. | OK |
| $5015-$6FFF | OK | OK |
| $7000 | RAM at $7000 confuses EXEC boot sequence. | OK if no ECS. |
| $7001-$77FF | OK if no ECS. | OK if no ECS. |
| $7800-$7FFF | Do not map RAM here due to GRAM alias. | OK if no ECS. |
| $8000-$8FFF | OK. Avoid STIC alias at $8000-$803F. | OK. Avoid STIC alias at $8000-$803F. |
| $9000-$B7FF | OK | OK |
| $B800-$BFFF | Do not map RAM here due to GRAM alias. | OK |
| $C000-$CFFF | OK. Avoid STIC alias at $C000-$C03F. | OK. Avoid STIC alias at $C000-$C03F. |
| $D000-$DFFF | OK | OK |
| $E000-$EFFF | OK if no ECS. | OK if no ECS. |
| $F000-$F7FF | OK | OK |
| $F800-$FFFF | Do not map RAM here due to GRAM alias. | OK |
