Branch - Revision history

Mr z: Protected "Branch" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))

2010-12-04T08:08:43Z

Protected "Branch" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))

Mr z: /* grammar tweak */

2005-01-12T18:55:09Z

‎grammar tweak

192.94.94.105: /* explain why the direction flag */

2005-01-12T18:44:44Z

‎explain why the direction flag

Pingaso at 00:15, 12 January 2005

2005-01-12T00:15:32Z

Pingaso at 00:15, 12 January 2005

2005-01-12T00:15:16Z

Pingaso at 23:57, 11 January 2005

2005-01-11T23:57:31Z

Pingaso at 23:50, 11 January 2005

2005-01-11T23:50:51Z

Pingaso at 23:48, 11 January 2005

2005-01-11T23:48:35Z

Pingaso at 23:46, 11 January 2005

2005-01-11T23:46:30Z

Pingaso at 23:27, 11 January 2005

2005-01-11T23:27:08Z

New page

[[Category:CP1610]]
<table border>
<tr><td>Instruction Name</td><td>Branch</td></tr>
<tr><td>Mnemonics</td><td>B/BC/BOV/BPL<br/>BEQ/BLT/BLE/BUSC<br/>NOPP/BNC/BNOV/BMI<br/>BNEQ/BGE/BGT/BESC<br/>BEXT</td></tr>
<tr><td>CP1610 Clock Cycles</td><td>7 or 9</td></tr>
<tr><td>Interruptible</td><td>Yes</td></tr>
<tr><td>Opcode Range</td><td>$0200-$023F</td></tr>
</table><br/>

Similar to the [[Jump]] family of instructions, Branch is also an entire family of instructions that are represented as any of several different possible mnemonics, depending on the flags indicated in the opcode. The opcode format breaks down as follows.

Format - Decle #1
0000:0010:00de:nccc 0000:00aa<br/>
where:<br/>
d indicates the direction of the branch
such that:
d == 0 indicates to branch in the forward direction
d == 1 indicates to branch in the reverse direction<br/>
e indicates to branch on an external condition
such that if e == 0, then:
nccc == 0000 branch unconditionally (B)
nccc == 0001 branch if [[Carry Flag]] is set (BC)
nccc == 0010 branch if [[Overflow Flag]] is set (BOV)
nccc == 0011 branch if [[Sign Flag]] is clear (BPL)
nccc == 0100 branch if [[Zero Flag]] is set (BEQ or BZ)
nccc == 0101 branch if [[Sign Flag]] != [[Overflow Flag]] (BLT)
nccc == 0110 branch if either [[Zero Flag]] is set
or if [[Sign Flag]] != [[Overflow Flag]] (BLE)
nccc == 0111 branch if [[Sign Flag]] != [[Carry Flag]] (BUSC)
nccc == 1000 do not branch unconditionally (NOPP)
nccc == 1001 do not branch if [[Carry Flag]] is set (BNC)
nccc == 1010 do not branch if [[Overflow Flag]] is set (BNOV)
nccc == 1011 do not branch if [[Sign Flag]] is clear (BMI)
nccc == 1100 do not branch if [[Zero Flag]] is set (BNEQ or BNZ)
nccc == 1101 do not branch if [[Sign Flag]] != [[Overflow Flag]] (BGE)
nccc == 1110 do not branch if either [[Zero Flag]] is set
or if [[Sign Flag]] != [[Overflow Flag]] (BGT)
nccc == 1111 do not branch if [[Sign Flag]] != [[Carry Flag]] (BESC)
otherwise if e == 1, then:
nccc branch if this value matches the pins EBCA0-EBCA3 (BEXT)

The Branch opcode family is often represented as many different mnemonics, to make life a little easier for the programmer. The mnemonic used to represent this opcode depends on the combination of the e, n, and ccc parameters mentioned above, according to the following chart.<br/><br/>

<strong>Mnemonics To Parameters</strong><br/>
<table border width=50%>
<tr><th>Mnemonic</th><th>e</th><th>n</th><th>ccc</th></tr>
<tr><td>[[B]]</td><td>0</td><td>0</td><td>000</td></tr>
<tr><td>[[BC]]</td><td>0</td><td>0</td><td>001</td></tr>
<tr><td>[[BOV]]</td><td>0</td><td>0</td><td>010</td></tr>
<tr><td>[[BPL]]</td><td>0</td><td>0</td><td>011</td></tr>
<tr><td>[[BEQ or BZ]]</td><td>0</td><td>0</td><td>100</td></tr>
<tr><td>[[BLT]]</td><td>0</td><td>0</td><td>101</td></tr>
<tr><td>[[BLE]]</td><td>0</td><td>0</td><td>110</td></tr>
<tr><td>[[BUSC]]</td><td>0</td><td>0</td><td>111</td></tr>
<tr><td>[[NOPP]]</td><td>0</td><td>1</td><td>000</td></tr>
<tr><td>[[BNC]]</td><td>0</td><td>1</td><td>001</td></tr>
<tr><td>[[BNOV]]</td><td>0</td><td>1</td><td>010</td></tr>
<tr><td>[[BMI]]</td><td>0</td><td>1</td><td>011</td></tr>
<tr><td>[[BNEQ or BZ]]</td><td>0</td><td>1</td><td>100</td></tr>
<tr><td>[[BGE]]</td><td>0</td><td>1</td><td>101</td></tr>
<tr><td>[[BGT]]</td><td>0</td><td>1</td><td>110</td></tr>
<tr><td>[[BESC]]</td><td>0</td><td>1</td><td>111</td></tr>
<tr><td>[[BEXT]]</td><td>1</td><td align=center colspan=2>any value</td></tr>
</table><br/>

@@ Line 46: / Line 46: @@
 Notice that the n parameter from above essentially just negates the internal conditions represented by ccc.<br/><br/>
 The branch destination is calculated from the address of the opcode immediately following the two-decle Branch instruction such that if the branch instruction is location at $1800 and the offset indicated by aaaaaaaaaaaaaaaa is $0007, then the destination in the forward direction would be $1809.  It's a little trickier in the reverse direction because the CP1610 seems to add one to the offset if the branch is in the reverse direction, possibly because it is using ones complement arithmetic to calculate the offset.  Either way, if the branch is in the reverse direction, then our example would result in a branch to location $17FA ($1800+2-7-1).<br/><br/>
-Branches encode a "branch direction" to make small offsets useful.  The [[CP1610]] includes many opcode tradeoffs that allow (but do not require) object code to reside in a ROM that 10 bits wide.  When wider ROM is available, programs may make use of larger immediate constants.  (GI documentation describes 12-bit and 14-bit wide peripherals and memories.)  In narrow ROMs, tweaks such as this one allow the smaller immediate constant range to be useful.  In this case, one may branch forward or backward by 2K words when code resides in 10-bit ROM.  Without the flag, this would not be possible.  The direction flag is technically unnecessary when code resides in 16-bit ROM.<br/><br/>
+Branches encode a "branch direction" to make small offsets useful.  The [[CP1610]] includes many opcode tradeoffs that allow (but do not require) object code to reside in a ROM that 10 bits wide.  When wider ROM is available, programs may make use of larger immediate constants.  (GI documentation describes 12-bit and 14-bit wide peripherals and memories.)  In narrow ROMs, tweaks such as this one make the smaller immediate constant range useful.  In this case, one may branch forward or backward by 2K words when code resides in 10-bit ROM.  Without the flag, this would not be possible.  The direction flag is technically unnecessary when code resides in 16-bit ROM.<br/><br/>
 The Branch opcode family is often represented as many different mnemonics, to make life a little easier for the programmer.  The mnemonic used to represent this opcode depends on the combination of the e, n, and ccc parameters mentioned above, according to the following chart.<br/><br/>

@@ Line 13: / Line 13: @@
 The opcode format breaks down as follows.
-     Format - Decle #1    Format - Word #2 (Unknown if all 16 bits are significant)
+     Format - Decle #1    Format - Word #2 (All 16 bits are significant)
 :0010:00de:nccc  aaaa:aaaa:aaaa:aaaa<br/>
      where:<br/>
@@ Line 46: / Line 46: @@
 Notice that the n parameter from above essentially just negates the internal conditions represented by ccc.<br/><br/>
 The branch destination is calculated from the address of the opcode immediately following the two-decle Branch instruction such that if the branch instruction is location at $1800 and the offset indicated by aaaaaaaaaaaaaaaa is $0007, then the destination in the forward direction would be $1809.  It's a little trickier in the reverse direction because the CP1610 seems to add one to the offset if the branch is in the reverse direction, possibly because it is using ones complement arithmetic to calculate the offset.  Either way, if the branch is in the reverse direction, then our example would result in a branch to location $17FA ($1800+2-7-1).<br/><br/>
 The Branch opcode family is often represented as many different mnemonics, to make life a little easier for the programmer.  The mnemonic used to represent this opcode depends on the combination of the e, n, and ccc parameters mentioned above, according to the following chart.<br/><br/>

@@ Line 8: / Line 8: @@
 </table><br/>
-The Branch family of instructions is similar to the [[Jump]] family of instructions in that Branch instructions are also represented as any of several different possible mnemonics, depending on the flags indicated in the opcode.  The number of clock cycles used also depends on whether the branch is taken or not.  If the condition is tests true, and the branch occurs, then the opcode will use 9 [[CP1610]] clock cycles.  If the condition tests false, then the branch is ignored and the opcode will use 7 [[CP1610]] clock cycles. Note that the Unconditional Branch ([[B]]) always branches so it always uses 9 cycles, and the No Operation Branch ([[NOPP]]) never branches, so it always uses 7 cycles<br/><br/>
+The Branch family of instructions is similar to the [[Jump]] family of instructions in that Branch instructions are also represented as any of several different possible mnemonics, depending on the flags indicated in the opcode.  Branching is different than Jumping, however, in that a Branch could be conditional and the destination is calculated from a relative offset rather than an absolute destination address.<br/><br/>
 The opcode format breaks down as follows.

@@ Line 12: / Line 12: @@
 The opcode format breaks down as follows.
-     Format - Decle #1    Format - Decle #2
+     Format - Decle #1    Format - Word #2 (Unknown if all 16 bits are significant)
 :0010:00de:nccc  aaaa:aaaa:aaaa:aaaa<br/>
      where:<br/>

← Older revision	Revision as of 08:08, 4 December 2010
(No difference)

@@ Line 63: / Line 63: @@
 <tr><td>[[BNOV]]</td><td>0</td><td>1</td><td>010</td></tr>
 <tr><td>[[BMI]]</td><td>0</td><td>1</td><td>011</td></tr>
-<tr><td>[[BNEQ|BNEQ or BZ]]</td><td>0</td><td>1</td><td>100</td></tr>
+<tr><td>[[BNEQ|BNEQ or BNZ]]</td><td>0</td><td>1</td><td>100</td></tr>
 <tr><td>[[BGE]]</td><td>0</td><td>1</td><td>101</td></tr>
 <tr><td>[[BGT]]</td><td>0</td><td>1</td><td>110</td></tr>

@@ Line 55: / Line 55: @@
 <tr><td>[[BOV]]</td><td>0</td><td>0</td><td>010</td></tr>
 <tr><td>[[BPL]]</td><td>0</td><td>0</td><td>011</td></tr>
-<tr><td>[[BEQ or BZ]]</td><td>0</td><td>0</td><td>100</td></tr>
+<tr><td>[[BEQ|BEQ or BZ]]</td><td>0</td><td>0</td><td>100</td></tr>
 <tr><td>[[BLT]]</td><td>0</td><td>0</td><td>101</td></tr>
 <tr><td>[[BLE]]</td><td>0</td><td>0</td><td>110</td></tr>
@@ Line 63: / Line 63: @@
 <tr><td>[[BNOV]]</td><td>0</td><td>1</td><td>010</td></tr>
 <tr><td>[[BMI]]</td><td>0</td><td>1</td><td>011</td></tr>
-<tr><td>[[BNEQ or BZ]]</td><td>0</td><td>1</td><td>100</td></tr>
+<tr><td>[[BNEQ|BNEQ or BZ]]</td><td>0</td><td>1</td><td>100</td></tr>
 <tr><td>[[BGE]]</td><td>0</td><td>1</td><td>101</td></tr>
 <tr><td>[[BGT]]</td><td>0</td><td>1</td><td>110</td></tr>

@@ Line 21: / Line 21: @@
          e      indicates to branch on an external condition
                 such that if e == 0, then:
-                    nccc == 0000   branch unconditionally (B)
+                    nccc == 0000   branch unconditionally ([[B]])
-                    nccc == 0001   branch if [[Carry Flag]] is set (BC)
+                    nccc == 0001   branch if [[Carry Flag]] is set ([[BC]])
-                    nccc == 0010   branch if [[Overflow Flag]] is set (BOV)
+                    nccc == 0010   branch if [[Overflow Flag]] is set ([[BOV]])
-                    nccc == 0011   branch if [[Sign Flag]] is clear (BPL)
+                    nccc == 0011   branch if [[Sign Flag]] is clear ([[BPL]])
-                    nccc == 0100   branch if [[Zero Flag]] is set (BEQ or BZ)
+                    nccc == 0100   branch if [[Zero Flag]] is set ([[BEQ]])
-                    nccc == 0101   branch if [[Sign Flag]] != [[Overflow Flag]] (BLT)
+                    nccc == 0101   branch if [[Sign Flag]] != [[Overflow Flag]] ([[BLT]])
                     nccc == 0110   branch if either [[Zero Flag]] is set
-                                   or if [[Sign Flag]] != [[Overflow Flag]] (BLE)
+                                   or if [[Sign Flag]] != [[Overflow Flag]] ([[BLE]])
-                    nccc == 0111   branch if [[Sign Flag]] != [[Carry Flag]] (BUSC)
+                    nccc == 0111   branch if [[Sign Flag]] != [[Carry Flag]] ([[BUSC]])
-                    nccc == 1000   do not branch unconditionally (NOPP)
+                    nccc == 1000   do not branch unconditionally ([[NOPP]])
-                    nccc == 1001   do not branch if [[Carry Flag]] is set (BNC)
+                    nccc == 1001   do not branch if [[Carry Flag]] is set ([[BNC]])
-                    nccc == 1010   do not branch if [[Overflow Flag]] is set (BNOV)
+                    nccc == 1010   do not branch if [[Overflow Flag]] is set ([[BNOV]])
-                    nccc == 1011   do not branch if [[Sign Flag]] is clear (BMI)
+                    nccc == 1011   do not branch if [[Sign Flag]] is clear ([[BMI]])
-                    nccc == 1100   do not branch if [[Zero Flag]] is set (BNEQ or BNZ)
+                    nccc == 1100   do not branch if [[Zero Flag]] is set ([[BNEQ]])
-                    nccc == 1101   do not branch if [[Sign Flag]] != [[Overflow Flag]] (BGE)
+                    nccc == 1101   do not branch if [[Sign Flag]] != [[Overflow Flag]] ([[BGE]])
                     nccc == 1110   do not branch if either [[Zero Flag]] is set
-                                   or if [[Sign Flag]] != [[Overflow Flag]] (BGT)
+                                   or if [[Sign Flag]] != [[Overflow Flag]] ([[BGT]])
-                    nccc == 1111   do not branch if [[Sign Flag]] != [[Carry Flag]] (BESC)
+                    nccc == 1111   do not branch if [[Sign Flag]] != [[Carry Flag]] ([[BESC]])
                 otherwise if e == 1, then:
-                    nccc    branch if this value matches the pins EBCA0-EBCA3 (BEXT)<br/>
+                    nccc    branch if this value matches the pins EBCA0-EBCA3 ([[BEXT]])<br/>
          aaaaaaaaaaaaaaaa    indicates the amount of offset