Difference between revisions of "MVI@"
m (Protected "MVI@" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite)))
Latest revision as of 08:52, 4 December 2010
|Instruction Name||Move In Indirect|
|CP1610 Clock Cycles||8, 10, or 11|
|Input Flags||Double Byte Data Flag|
The Move In Indirect (MVI@) instruction copies the value from the address contained in the specified address register into the specified destination register. Assuming the Double Byte Data Flag is clear, then this instruction will use 8 clock cycles unless R6 is used as the address register, in which case it will use 11 clock cycles.
If prefixed with SDBD, this instruction will perform two indirect reads to build a 16-bit value for its first operand, and will always use exactly 10 clock cycles regardless of which register is used as the address register. See Double Byte Data for more details on how SDBD interacts with Indirect Mode.
The "PULR Rx" instruction is an alias for "MVI@ R6, Rx".
where: ddd indicates the register containing the value to move such that: ddd == 000 indicates register R0 ddd == 001 indicates register R1 ddd == 010 indicates register R2 ddd == 011 indicates register R3 ddd == 100 indicates register R4 ddd == 101 indicates register R5 ddd == 110 indicates register R6 ddd == 111 indicates register R7
aaa indicates the register containing the address such that: aaa == 000 indicates direct mode MVI instruction aaa == 001 indicates register R1 aaa == 010 indicates register R2 aaa == 011 indicates register R3 aaa == 100 indicates register R4 aaa == 101 indicates register R5 aaa == 110 indicates register R6, which operates in stack mode aaa == 111 indicates register R7, alias for immediate mode MVII