# Introducing the Instruction Set Part 2

### From Intellivision Wiki

(→Moving On) |
m (Protected "Introducing the Instruction Set Part 2" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))) |

## Latest revision as of 08:41, 4 December 2010

This short part covers the Single Register Arithmetic instructions as well as the Implied Operand instructions. If you haven't read it already, please see Introducing the Instruction Set Part 1.

# Single Register Arithmetic Instructions

These instructions are fairly simple instructions that operate on a single register:

TSTR | Check sign, zero on a register | |
---|---|---|

CLRR | Set a register to 0 | R = 0 |

INCR | Increment a register | R = R + 1 |

DECR | Decrement a register | R = R - 1 |

NEGR | Negate a register | R = -R |

COMR | 1s complement a register | R = R XOR $FFFF |

ADCR | Add carry bit to register | R = R + C |

These instructions work equally on all 8 registers. That includes the program counter. For instance, "INCR R7" (aka. INCR PC) will skip the next instruction word. That can be useful for skipping single-word instructions. "DECR R7" (aka. DECR PC) is equivalent to "here: B here", but is one byte shorter.

Example: Consider the value of R0 at each step in this sequence as it executes:

CLRR R0 ; Clear R0: R0 = 0 INCR R0 ; Add 1 to R0: R0 = 1 DECR R0 ; Subtract 1 from R0: R0 = 0 COMR R0 ; 1s complement R0: R0 = $FFFF NEGR R0 ; Negate R0: R0 = 1

The ADCR instruction is useful for extended precision arithmetic. The following example shows how to add the 32-bit number in R3:R2 to the 32-bit number in R1:R0. (R3 and R1 hold the upper halves of the 32-bit numbers, whereas R2 and R0 hold the lower halves.)

; Add lower halves together. This generates a carry in 'C'
ADDR R2, R0
; Add carry into upper half of result
ADCR R1
; Now add upper halves together.
ADDR R3, R1

# Implied Operand Instructions

These instructions don't operate on any register:

NOP | No operation |
---|---|

SETC | Set carry flag |

CLRC | Clear carry flag |

EIS | Enable interrupts |

DIS | Disable interrupts |

SETC, CLRC and NOP are fairly self explanatory. EIS and DIS are also straightforward, though interrupts are beyond the scope of this tutorial. They are important, and I will cover them in a future tutorial.

# Moving On

At this point, you may wish to continue with the remaining parts of this tutorial:

- Introducing the Instruction Set Part 1: The CPU, Memory and Registers; Primary Instructions and Addressing Modes
- Introducing the Instruction Set Part 3: Branches, Conditional Branches and Calls
- Introducing the Instruction Set Part 4: Shift and Rotate Instructions

Or, you can return to the Programming Tutorials index.