Difference between revisions of "Interrupt Enable Flag"

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[[Category:CP1610]]
 
[[Category:CP1610]]
The Interrupt Enable Flag (I), if set, allows the INTRM line to trigger an interrupt after the next [[CP1610#Interruptibility|interruptible instruction]], which causes the [[CP1610]] to push the program pointer (R7) onto the stack and jump to the interrupt subroutine located in the [[Executive ROM]] at $1004. The CP1610 uses 7 clock cycles whenever it accepts an interrupt requests and vectors to the interrupt handler. The following opcodes affect the status of the Interrupt Enable Flag.<br/><br/>
+
The Interrupt Enable Flag (I), if set, allows the INTRM line to trigger an interrupt after the next [[CP1610#Interruptibility|interruptible instruction]], which causes the [[CP1610]] to push the program pointer (R7) onto the stack and jump to the interrupt subroutine located in the [[Executive ROM]] at $1004. The CP1610 uses 7 clock cycles whenever it accepts an interrupt requests and vectors to the interrupt handler. For more information, see the [[VBlank Interrupt]] documentation. The following opcodes affect the status of the Interrupt Enable Flag.<br/><br/>
  
 
[[EIS]]<br/>
 
[[EIS]]<br/>

Revision as of 19:47, 12 January 2005

The Interrupt Enable Flag (I), if set, allows the INTRM line to trigger an interrupt after the next interruptible instruction, which causes the CP1610 to push the program pointer (R7) onto the stack and jump to the interrupt subroutine located in the Executive ROM at $1004. The CP1610 uses 7 clock cycles whenever it accepts an interrupt requests and vectors to the interrupt handler. For more information, see the VBlank Interrupt documentation. The following opcodes affect the status of the Interrupt Enable Flag.

EIS
DIS
JE
JD
JSRE
JSRD