Direct Mode

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Direct Mode accesses directly specify the address to read or write in the single word following the instruction.  The range of addresses a [[Direct Mode]] instruction can access is a function of the width of the ROM that contains the object code.
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Direct Mode accesses directly specify the address to read or write in the single word following the instruction.  The range of addresses a Direct Mode instruction can access is a function of the width of the ROM that contains the object code.
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Direct Mode instructions rely on the ADAR (Addressed Data to Address Register) [[Bus Phases|Bus Phase]] to inform the system of the address to access.  Ordinarily, the programmer need not be aware of this detail.  However, the System RAM does not correctly implement the ADAR [[Bus Phases|Bus Phase]]--it treats it as equivalent to the BAR (Bus to Address Register) [[Bus Phases|Bus Phase]].  Therefore, program code loaded into System RAM must not use [[Direct Mode]] instructions, as they will not function correctly.
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Direct Mode instructions rely on the ADAR (Addressed Data to Address Register) [[Bus Phases|Bus Phase]] to inform the system of the address to access.  Ordinarily, the programmer need not be aware of this detail.  However, the System RAM does not correctly implement the ADAR [[Bus Phases|Bus Phase]]--it treats it as equivalent to the BAR (Bus to Address Register) [[Bus Phases|Bus Phase]].  Therefore, program code loaded into System RAM must not use Direct Mode instructions, as they will not function correctly.
The following are Direct Mode instructions.
The following are Direct Mode instructions.

Revision as of 14:36, 15 January 2005

Direct Mode accesses directly specify the address to read or write in the single word following the instruction. The range of addresses a Direct Mode instruction can access is a function of the width of the ROM that contains the object code.

Direct Mode instructions rely on the ADAR (Addressed Data to Address Register) Bus Phase to inform the system of the address to access. Ordinarily, the programmer need not be aware of this detail. However, the System RAM does not correctly implement the ADAR Bus Phase--it treats it as equivalent to the BAR (Bus to Address Register) Bus Phase. Therefore, program code loaded into System RAM must not use Direct Mode instructions, as they will not function correctly.

The following are Direct Mode instructions.

MVO
MVI
ADD
SUB
CMP
AND
XOR

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