Difference between revisions of "ANDR"

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Latest revision as of 07:49, 4 December 2010

Instruction NameAnd Registers
MnemonicANDR
CP1610 Clock Cycles6
InterruptibleYes
Opcode Range$0180-$01BF
Input FlagsNone
Output FlagsSign Flag, Zero Flag

The AND Registers (ANDR) instruction performs a bitwise AND of the value in the specified source register with the value in the specified destination register, stores the result in the destination register, and sets or clears the Sign Flag and Zero Flag according to the result.

   0000:0001:10ss:sddd
where: sss indicates the source register such that: sss == 000 indicates register R0 sss == 001 indicates register R1 sss == 010 indicates register R2 sss == 011 indicates register R3 sss == 100 indicates register R4 sss == 101 indicates register R5 sss == 110 indicates register R6 sss == 111 indicates register R7
ddd indicates the destination register such that: ddd == 000 indicates register R0 ddd == 001 indicates register R1 ddd == 010 indicates register R2 ddd == 011 indicates register R3 ddd == 100 indicates register R4 ddd == 101 indicates register R5 ddd == 110 indicates register R6 ddd == 111 indicates register R7