VBlank Period 2 - Revision history

Mr z: Protected "VBlank Period 2" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))

2010-12-04T07:42:05Z

Protected "VBlank Period 2" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))

Pingaso at 22:09, 11 January 2005

2005-01-11T22:09:05Z

Pingaso at 06:24, 11 January 2005

2005-01-11T06:24:26Z

Pingaso at 00:21, 11 January 2005

2005-01-11T00:21:23Z

Mr z at 00:12, 11 January 2005

2005-01-11T00:12:33Z

New page

The [[STIC]] facilitates access to [[GRAM]] and [[GROM]] for only certain time periods as part of its vertical refresh duties. These time periods are anchored relative to the [[VBlank interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.

== NTSC Intellivisions ==

When the display's active, the GRAM and GROM are available for approximately 3796 cycles following the [[VBlank interrupt]]. When the display is not active--that is, the program did not write to location $0020 (or its aliases at $4020, $8020 or $C020) during [[VBlank Period 1]]--the GRAM and GROM remain accessible until the program makes the display active.

This period is longer than [[VBlank Period 1]].

== PAL/SECAM Intellivisions ==

No data is presently available for these systems. Given the lower refresh rate and higher clock rate of these systems, both VBlank Period 1 and VBlank Period 2 are probably longer than they are on the NTSC systems. New games should design for the tighter NTSC time windows.

← Older revision		Revision as of 22:09, 11 January 2005
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		+	[[Category:STIC]]
	The [[STIC]] facilitates access to [[Graphics RAM\|GRAM]] and [[Graphics ROM\|GROM]] for only certain time periods as part of its vertical refresh duties. These time periods are anchored relative to the [[VBlank Interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.		The [[STIC]] facilitates access to [[Graphics RAM\|GRAM]] and [[Graphics ROM\|GROM]] for only certain time periods as part of its vertical refresh duties. These time periods are anchored relative to the [[VBlank Interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.

@@ Line 1: / Line 1: @@
-The [[STIC]] facilitates access to [[Graphics RAM|GRAM]] and [[Graphics ROM|GROM]] for only certain time periods as part of its vertical refresh duties.  These time periods are anchored relative to the [[VBlank interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.
+The [[STIC]] facilitates access to [[Graphics RAM|GRAM]] and [[Graphics ROM|GROM]] for only certain time periods as part of its vertical refresh duties.  These time periods are anchored relative to the [[VBlank Interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.
 == NTSC Intellivisions ==
-When the display's active, the GRAM and GROM are available for approximately 3796 cycles following the [[VBlank interrupt]].  When the display is not active--that is, the program did not write to location $0020 (or its aliases at $4020, $8020 or $C020) during [[VBlank Period 1]]--the GRAM and GROM remain accessible until the program makes the display active.
+When the display's active, the GRAM and GROM are available for approximately 3796 cycles following the [[VBlank Interrupt]].  When the display is not active--that is, the program did not write to location $0020 (or its aliases at $4020, $8020 or $C020) during [[VBlank Period 1]]--the GRAM and GROM remain accessible until the program makes the display active.
 This period is longer than [[VBlank Period 1]].

← Older revision		Revision as of 00:21, 11 January 2005
Line 1:		Line 1:
−	The [[STIC]] facilitates access to [[GRAM]] and [[GROM]] for only certain time periods as part of its vertical refresh duties. These time periods are anchored relative to the [[VBlank interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.	+	The [[STIC]] facilitates access to [[Graphics RAM\|GRAM]] and [[Graphics ROM\|GROM]] for only certain time periods as part of its vertical refresh duties. These time periods are anchored relative to the [[VBlank interrupt]] that the STIC generates and the [[Bus Copy]] mode that the [[System RAM]] implements.

	== NTSC Intellivisions ==		== NTSC Intellivisions ==

← Older revision	Revision as of 07:42, 4 December 2010
(No difference)