Memory Map - Revision history

Mr z: Protected "Memory Map" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))

2010-12-04T08:54:48Z

Protected "Memory Map" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite))

Mr z at 08:54, 4 December 2010

2010-12-04T08:54:40Z

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2010-11-23T03:33:51Z

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2010-11-21T06:18:31Z

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2010-11-04T09:52:44Z

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Mr z at 22:21, 8 October 2007

2007-10-08T22:21:04Z

Mr z: /* Additional Occupied Memory Ranges */

2006-06-20T15:43:19Z

‎Additional Occupied Memory Ranges

Mr z: /* Additional Occupied Memory Ranges */

2006-06-20T15:40:01Z

‎Additional Occupied Memory Ranges

Mr z: /* Additional Occupied Memory Ranges */

2005-06-02T23:46:32Z

‎Additional Occupied Memory Ranges

Mr z: /* Additional Memory Aliases */

2005-06-02T23:46:10Z

‎Additional Memory Aliases

@@ Line 5: / Line 5: @@
 <tr><td>$0000-$003F</td><td>RW, [[VBlank Period 1]]</td><td>[[STIC#Registers|STIC Registers]]</td></tr>
 <tr><td>$0100-$01EF</td><td>RW</td><td>[[Scratchpad RAM]]</td></tr>
-<tr><td>$01F0-$01FF</td><td>RW</td><td>PSG Registers</td></tr>
+<tr><td>$01F0-$01FF</td><td>RW</td><td>[[PSG#Registers|PSG Registers]]</td></tr>
 <tr><td>$0200-$035F</td><td>RW</td><td>[[System RAM]]</td></tr>
 <tr><td>$1000-$1FFF</td><td>R</td><td>[[Executive ROM]]</td></tr>

@@ Line 17: / Line 17: @@
 ==Additional Occupied Memory Ranges==
-Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip [[Incomplete Address Decoding|incompletely decoded addresses]] that were placed on the address bus.  This is an artifact of how the [[System RAM]] implements its [[Bus Copy]] functionality.  Also, the Intellivision 2 throws a few quirks into the equation.<br/><br/>
+Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip [[Incomplete Address Decoding|incompletely decoded addresses]] that were placed on the address bus.  This is an artifact of how the [[System RAM]] implements its [[Bus Copy]] functionality.  For instance, if the CPU reads from the STIC or GRAM aliases it will not see any data from the STIC or GRAM.  However, if it reads from $4021, $8021 or $C021 during [[VBlank Period 1]] the STIC <I>will</I> switch into Color Stack mode.  Also, the Intellivision 2 throws a few quirks into the equation.<br/><br/>
 <table border width=80%>
 <tr><th>Memory Range<th>Accessibility<th>Device</th></tr>
@@ Line 46: / Line 46: @@
 </table>
 <br/>
 ==Addresses Available to Cartridges==

@@ Line 27: / Line 27: @@
 <tr><td>$3E00-$3FFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 <tr><td>$4000-$403F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
-<tr><td>$4021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr><!-- Note:  I do need to double check this. -->
+<tr><td>$4021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register.</td></tr>
 <tr><td>$7800-$79FF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 <tr><td>$7A00-$7BFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
@@ Line 33: / Line 33: @@
 <tr><td>$7E00-$7FFF</td><td>W, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 <tr><td>$8000-$803F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
-<tr><td>$8021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr><!-- Note:  I do need to double check this. -->
+<tr><td>$8021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr>
 <tr><td>$B800-$B9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 <tr><td>$BA00-$BBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
@@ Line 39: / Line 39: @@
 <tr><td>$BE00-$BFFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 <tr><td>$C000-$C03F</td><td>W, [[VBlank Period 1]]</td><td>STIC Registers</td></tr>
-<tr><td>$C021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr><!-- Note:  I do need to double check this. -->
+<tr><td>$C021</td><td>RW, [[VBlank Period 1]]</td><td>STIC Mode Select register</td></tr>
 <tr><td>$F800-$F9FF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
 <tr><td>$FA00-$FBFF</td><td>W, [[VBlank Period 2]]</td><td> Graphics RAM</td></tr>
@@ Line 46: / Line 46: @@
 </table>
 <br/>
 ==Addresses Available to Cartridges==

@@ Line 20: / Line 20: @@
 <table border width=80%>
 <tr><th>Memory Range<th>Accessibility<th>Device</th></tr>
-<tr><td>$0040-$007F</td><td>R,  [[VBlank Period 2]]</td><td>STIC-sensitive, unknown purpose</td></tr>
+<tr><td>$0040-$007F</td><td>R,  [[VBlank Period 2]]</td><td>STIC-responsive, but read only</td></tr>
 <tr><td>$0360-$03FF</tD><td>R</td><td>Garbage values due to incomplete address decode in RA-3-9600A (Intellivision II only?)</td></tr>
 <tr><td>$0400-$04FF</td><td>R</td><td>Additional EXEC ROM, Intellivision II only</td></tr>

@@ Line 16: / Line 16: @@
 Mattel had also reserved additional address ranges for various periperals, such as the [[Keyboard Component]], the [[PlayCable]], and the [[Intellivoice]].  Many of these reserved address ranges went effectively unused, and so aren't shown.  Each peripheral's address map is documented with the peripheral itself.
-==Additional Memory Aliases==
+==Additional Occupied Memory Ranges==
-Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip [[Incomplete Address Decoding|incompletely decoded addresses]] that were placed on the address bus.  This is an artifact of how the [[System RAM]] implements its [[Bus Copy]] functionality.<br/><br/>
+Note that the official memory map shown above is actually incomplete, due to the fact that the STIC and the Graphics RAM chip [[Incomplete Address Decoding|incompletely decoded addresses]] that were placed on the address bus.  This is an artifact of how the [[System RAM]] implements its [[Bus Copy]] functionality.  Also, the Intellivision 2 throws a few quirks into the equation.<br/><br/>
 <table border width=80%>
 <tr><th>Memory Range<th>Accessibility<th>Device</th></tr>
 <tr><td>$3A00-$3BFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>
 <tr><td>$3C00-$3DFF</td><td>RW, [[VBlank Period 2]]</td><td>Graphics RAM</td></tr>

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